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T UCT MEN ROD TE P EPLACE ter at OLE n OBS ENDED R pport Ce m/tsc Su l.co MM tersi ECO nical NO R our Tech r www.in Dataact Sheet IL o September 26, 2001 cont -INTERS 8 1-88
EL2070
FN7031
200MHz Current Feedback Amplifier
The EL2070 is a wide bandwidth, fast settling monolithic amplifier incorporating a disable/enable feature. Built using an advanced complementary bipolar process, this amplifier uses current-mode feedback to achieve more bandwidth at a given gain than conventional operational amplifiers. Designed for closed-loop gains of 1 to 8, the EL2070 has a 200MHz -3dB bandwidth (AV = +2), and 12ns settling to 0.05% while consuming only 15mA of supply current. Furthermore, the fast disable/enable times of 200ns/100ns allow rapid analog multiplexing. The EL2070 is an obvious high-performance solution for video distribution and line-driving applications, especially when its disable feature can be used for fast analog multiplexing. Furthermore, the low 15mA supply current, and the very low 5mA of supply current when disabled suggest use in systems where power is critical. With differential gain/phase of 0.02%/0.01, guaranteed video specifications, and a minimum 50mA output drive, performance in these areas is assured. The EL2070's settling to 0.05% in 12ns, low distortion, and ability to drive capacitive loads make it an ideal flash A/D driver. The wide 200MHz bandwidth and extremely linear phase allow unmatched signal fidelity. D/A systems can also benefit from the EL2070, especially if linearity and drive levels are important.
Features
* 200MHz -3dB bandwidth, AV = 2 * Disable/enable * 12ns settling to 0.05% * VS = 5V @ 15mA * Low distortion: HD2, HD3 @-60dBc at 20MHz * Differential gain 0.02% at NTSC, PAL * Differential phase 0.01 at NTSC, PAL * Overload/short-circuit protected * 1 to 8 closed-loop gain range * Low cost
Applications
* Video gain block * Video distribution * HDTV amplifier * Analog multiplexing (using disable) * Power-down mode (using disable) * High-speed A/D conversion * D/A I-V conversion * Photodiode, CCD preamps * IF processors * High-speed communications
Pinout
EL2070 (8-PIN SO, PDIP) TOP VIEW
Ordering Information
PART NUMBER EL2070CN EL2070CS TEMP. RANGE -40C to +85C -40C to +85C PACKAGE 8-Pin PDIP 8-Pin SO PKG. NO. MDP0031 MDP0027
Manufactured under U.S. Patent No. 4,893,091
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners.
EL2070
Absolute Maximum Ratings (TA = 25C)
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70mA
(Output is short-circuit protected to ground, however, maximum reliability is obtained if IOUT does not exceed 70mA)
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V Disable Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VS, -1V
Thermal Resistance. . . . . . . . . . . . . . . . . . . . . . . . .JA = 95C/W PDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JA = 175C/W SO-8 Applied Output Voltage (Disabled). . . . . . . . . . . . . . . . . . . . . . . .VS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Pin Temperature (Soldering, 5 Seconds). . . . . . . . . . . . . . . . . 300C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-60C to +150C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Open-Loop DC Electrical Specifications
PARAMETER VOS DESCRIPTION Input Offset Voltage
VS = 5V, RL = 100 unless otherwise specified TEST CONDITIONS TEMP 25C TMIN TMAX MIN TYP 2 MAX 5.5 8.2 9.0 10.0 10 40.0 25.0 36.0 50.0 10 200.0 30 46 50.0 45.0 40.0 50.0 50.0 16.0 4.0 100.0 50.0 0.5 0.1 100.0 200.0 0.5 2.0 1.2 50.0 35.0 3.3 3.5 70.0 2.1 2.0 2.0 0.2 200.0 20.0 7.0 200.0 UNIT mV mV mV V/C A A nA/C A A nA/C dB dB mA mA k k pF k pF V V mA mA V
d(VOS)/dT +IIN
Average Offset Voltage Drift +Input Current
(Note 1)
All 25C, TMAX TMIN
d(+IIN)/dT -IIN
Average +Input Current Drift -Input Current
(Note 1)
All 25.0C TMIN, TMAX
d(-IIN)/dT PSRR CMRR IS ISOFF +RIN
Average -Input Current Drift Power Supply Rejection Ratio Common-Mode Rejection Ratio Supply Current--Quiescent Supply Current--Disabled +Input Resistance
(Note 1)
All All All
No Load (Note 2)
All All 25C, TMAX TMIN
CIN ROUT ROUTD COUTD CMIR
Input Capacitance Output Impedance (DC) Output Resistance (DC) Output Capacitance (DC) Common-Mode Input Range Output Current Disabled Disabled (Note 3)
All All All All 25C, TMAX TMIN 25C, TMAX TMIN
IOUT
VOUT
Output Voltage Swing
No Load
All
2
EL2070
Open-Loop DC Electrical Specifications
PARAMETER VOUTL -ICMR +IPSR -IPSR ROL DESCRIPTION Output Voltage Swing Input Current Common Mode Rejection +Input Current Power Supply Rejection -Input Current Power Supply Rejection Transimpedance VS = 5V, RL = 100 unless otherwise specified (Continued) TEST CONDITIONS 100 TEMP 25C 25C 25C 25C 25C TMIN TMAX ILOGIC VDIS VEN IDIS IEN NOTES: 1. Measured from TMIN to TMAX. 2. Supply current when disabled is measured at the negative supply. 3. Common-mode input range for rated performance. Pin 8 Current @ 0V Maximum Pin 8 V to Disable Minimum Pin 8 V to Enable Minimum Pin 8 I to Disable Maximum Pin 8 I to Enable All All All All All 3.5 350.0 60.0 30.0 MIN 3.0 TYP 3.4 8.0 1.0 20 125.0 80.0 140.0 0.8 1.2 0.5 33.0 3.6 24 MAX UNIT V A/V A/V A/V V/mA V/mA V/mA mA V V A A
Closed-Loop AC Electrical Specifications
PARAMETER DESCRIPTION
VS = 5V, RF = 250, AV = +2, RL = 100 unless otherwise specified TEMP MIN TYP MAX UNIT
TEST CONDITIONS
FREQUENCY RESPONSE SSBW -3dB Bandwidth (VOUT < 0.5VPP) 25C TMIN TMAX LSBW -3dB Bandwidth (VOUT < 5.0VPP) AV = +5 All 150.0 150.0 120.0 35.0 50.0 200.0 MHz MHz MHz MHz
GAIN FLATNESS GFPL Peaking VOUT < 0.5VPP Peaking VOUT < 0.5VPP Rolloff VOUT < 0.5VPP < 40MHz 25C TMIN, TMAX > 40MHz 25C TMIN, TMAX < 75MHz 25C TMIN TMAX LPD Linear Phase Deviation VOUT < 0.5VPP < 75MHz 25C, TMIN TMAX 0.2 0.6 0.0 0.0 0.3 0.4 0.5 0.7 1.0 1.0 1.3 1.0 1.2 dB dB dB dB dB dB dB
GFPH
GFR
3
EL2070
Closed-Loop AC Electrical Specifications
PARAMETER DESCRIPTION VS = 5V, RF = 250, AV = +2, RL = 100 unless otherwise specified (Continued) TEMP MIN TYP MAX UNIT
TEST CONDITIONS
TIME-DOMAIN RESPONSE tR1, tF1 tR2, tF2 tS1 tS2 OS Rise Time, Fall Time Rise Time, Fall Time Settling Time to 0.1% Settling Time to 0.05% Overshoot 0.5V Step 5.0V Step 2.0V Step 2.0V Step 0.5V Step All All All All 25C, TMAX TMIN SR Slew Rate AV = +2 AV = - 2 DISTORTION HD2 2nd Harmonic Distortion at 20MHz 2VPP 25C TMIN TMAX HD3 3rd Harmonic Distortion at 20MHz 2VPP 25C TMIN, TMAX -60.0 -60.0 -45.0 -40.0 -45.0 -50.0 -50.0 dBc dBc dBc dBc dBc All All 430.0 700.0 1600.0 1.6 6.5 10.0 12.0 0.0 2.4 10.0 13.0 15.0 10.0 15.0 ns ns ns ns % % V/s V/s
EQUIVALENT INPUT NOISE NF Noise Floor > 100kHz (Note 1) 25C TMIN TMAX INV Integrated Noise 100kHz to 200MHz (Note 1) 25C TMIN TMAX DISABLE/ENABLE PERFORMANCE TOFF TON OFFIso Disable Time to > 50dB Enable Time Off Isolation 10MHz 10MHz All All All 55.0 1000.0 200.0 59.0 IV ns ns dB 40.0 -157.0 -154.0 -154.0 -153.0IV 57.0 57.0 63.0 dBm (1Hz) dBm (1Hz) dBm (1Hz) V V V
VIDEO PERFORMANCE dG dP dG dP VBW NOTES: 1. Noise Tests are performed from 5MHz to 200MHz. 2. Differential gain/phase tests are with RL = 100. For other values of RL, see curves. Differential Gain (Note 2) Differential Phase (Note 2) Differential Gain (Note 2) Differential Phase (Note 2) -0.1dB Bandwidth (Note 2) NTSC/PAL NTSC/PAL 30MHz 30MHz 25C 25C 25C 25C 25C 30.0 0.02 0.01 0.05 0.05 60.0 0.08 0.08 0.18 0.18 % pp pp % pp pp MHz
4
EL2070 Typical Performance Curves
Non-Inverting Frequency Response Inverting Frequency Response Frequency Response for Various RLs
Open-Loop Transimpedance Gain and Phase
2nd and 3rd Harmonic Distortion
2-Tone 3rd Order Intermodulation Intercept
Equivalent Input Noise
Power-Supply Rejection Ratio
Common-Mode Rejection Ratio
5
EL2070 Typical Performance Curves (Continued)
Settling Time Long-Term Settling Time Settling Time vs Load Capacitance
Recommended RS vs Load Capacitance
Pulse Response AV = +2
Pulse Response AV = +2
6
EL2070 Typical Performance Curves (Continued)
Differential Gain and Phase (3.58MHz) Differential Gain and Phase (4.43MHz) Differential Gain and Phase (30MHz)
Forward and Reverse Gain during Disable
Enable/Disable Response
Equivalent Circuit
7
EL2070 Burn-In Circuit
Differential Gain/Phase
An industry-standard method of measuring the distortion of a video component is to measure the amount of differential gain and phase error it introduces. To measure these, a 40 IREPP reference signal is applied to the device with 0V DC offset (0 IRE) at 3.58MHz for NTSC, 4.43MHz for PAL, and 30MHz for HDTV. A second measurement is then made with a 0.714V DC offset (100 IRE). Differential Gain is a measure of the change in amplitude of the sine wave, and is measured in percent. Differential Phase is a measure of the change in phase, and is measured in degrees. Typically, the maximum positive and negative deviations are summed to give peak values. In general, a back terminated cable (75 in series at the drive end and 75 to ground at the receiving end) is preferred since the impedance match at both ends will absorb any reflections. However, when double-termination is used, the received signal is reduced by half; therefore a gain of 2 configuration is typically used to compensate for the attenuation. In a gain of 2 configuration, with output swing of 2VPP, with each back-terminated load at 150. The EL2070 is capable of driving up to 4 back-terminated loads with excellent video performance. Please refer to the typical curves for more information on video performance with respect to frequency, gain, and loading.
ALL PACKAGES USE THE SAME SCHEMATIC.
Applications Information
Theory of Operation
The EL2070 has a unity gain buffer from the non-inverting input to the inverting input. The error signal of the EL2070 is a current flowing into (or out of) the inverting input. A very small change in current flowing through the inverting input will cause a large change in the output voltage. This current amplification is called the transimpedance (ROL) of the EL2070 [VOUT=(ROL) * (-IIN)]. Since ROL is very large, the current flowing into the inverting input in the steady-state (non-slewing) condition is very small. Therefore we can still use op-amp assumptions as a firstorder approximation for circuit analysis, namely that: 1.The voltage across the inputs is approximately 0V. 2.The current into the inputs is approximately 0mA.
Capacitive Feedback
The EL2070 relies on its feedback resistor for proper compensation. A reduction of the impedance of the feedback element results in less stability, eventually resulting in oscillation. Therefore, circuit implementations which have capacitive feedback should not be used because of the capacitor's impedance reduction with frequency. Similarly, oscillations can occur when using the technique of placing a capacitor in parallel with the feedback resistor to compensate for shunt capacitances from the inverting input to ground.
Resistor Value Selection and Optimization
The value of the feedback resistor (and an internal capacitor) sets the AC dynamics of the EL2070. The nominal value for the feedback resistor is 250, which is the value used for production testing. This value guarantees stability. For a given closed-loop gain the bandwidth may be increased by decreasing the feedback resistor and, conversely, the bandwidth may be decreased by increasing the feedback resistor. Reducing the feedback resistor too much will result in overshoot and ringing and eventually oscillations. Increasing the feedback resistor results in a lower -3dB frequency. Attenuation at high frequency is limited by a zero in the closed-loop transfer function which results from stray capacitance between the inverting input and ground. Consequently, it is very important to keep stray capacitance to a minimum at the inverting input.
Offset Adjustment Pin
Output offset voltage of the EL2070 can be nulled by tying a 10k potentiometer between +VS and -VS with the slider attached to pin 1. A full-range variation of the voltage at pin 1 to 5V results in an offset voltage adjustment of at least 10mV. For best settling performance pin 1 should be bypassed to ground with a ceramic capacitor located near to the package, even if the offset voltage adjustment feature is not being used.
Printed Circuit Layout
As with any high frequency device, good PCB layout is necessary for optimum performance. Ground plane construction is a requirement, as is good power-supply and Offset Adjust bypassing close to the package. The inverting input is sensitive to stray capacitance, therefore connections at the inverting input should be minimal, close to the
8
EL2070
package, and constructed with as little coupling to the ground plane as possible. Capacitance at the output node will reduce stability, eventually resulting in peaking, and finally oscillation if the capacitance is large enough. The design of the EL2070 allows a larger capacitive load than comparable products, yet there are occasions when a series resistor before the capacitance may be needed. Please refer to the graphs to determine the proper resistor value needed.
Disable/Enable Operation
The EL2070 has a disable/enable control input at pin 8. The device is enabled and operates normally when pin 8 is left open or tied to pin 7. When more than 350A is pulled from pin 8, the EL2070 is disabled. The output becomes a high impedance, the inverting input is no longer driven to the positive input voltage, and the supply current is reduced by 2/3. To make it easy to use this feature, there is an internal resistor to limit the current to a safe level (0.8mA) if pin 8 is grounded. To draw current out of pin 8 an open-collector TTL output, a 5V CMOS output, or an NPN transistor can be used.
9
EL2070 EL2070 Macromodel
* Revision A. March 1992 * Enhancements include PSRR, CMRR, and Slew Rate Limiting * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | .subckt M2070C 3 2 7 4 6 * * Input Stage * e1 10 0 3 0 1.0 vis 10 9 0V h2 9 12 vxx 1.0 r1 2 11 50 l1 11 12 48nH iinp 3 0 8A iinm 2 0 8A * * Slew Rate Limiting * h1 13 0 vis 600 r2 13 14 1K d1 14 0 dclamp d2 0 14 dclamp * * High Frequency Pole * e2 30 0 14 0 0.00166666666 l3 30 17 0.1H c5 17 0 0.1pF r5 17 0 500 * * Transimpedance Stage * g1 0 18 17 0 1.0 rol 18 0 150K cdp 18 0 2.8pF * * Output Stage * q1 4 18 19 qp q2 7 18 20 qn q3 7 19 21 qn q4 4 20 22 qp r7 21 6 2 r8 22 6 2 ios1 7 19 2.5mA ios2 20 4 2.5mA * * Supply Current * ips 7 4 9mA * * Error Terms * ivos 0 23 5mA
10
EL2070 EL2070 Macromodel (Continued)
vxx 23 0 0V e4 24 0 3 0 1.0 e5 25 0 7 0 1.0 e6 26 0 4 0 1.0 r9 24 23 3K r10 25 23 1K r11 26 23 1K * * Models * .model qn npn (is=5e-15 bf=200 tf=0.05nS) .model qp pnp (is=5e-15 bf=200 tf=0.05nS) .model dclamp d(is=1e-30 ibv=0.266 bv=1.3 n=4) .ends
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